Hey
Might check with the demo crowd. They do all kinds of things with the
sceen.
Regards
James Hanson
On Fri, 1 Feb 2002 03:22:18 -0600 (CST) David Wood
<jbevren@starbase.globalpc.net> writes:
> Last DANG try! :((((((((((
>
> I found this in my website, and am wondering about the likelyhood of
> it
> working:
> Phase 2: DMA
> We prepare address and place it, unmultiplexed on the bus
> C64 sets up Row address, toggles RAS
> c64 sets up Col address, asserts CAS for data read/write
> we grab the byte
> we change the low byte of the address to addr+1
> we change the high byte of the address to a known non-ram area (I/O,
> kernal,
> (above two happen at the same time)
> whatever)
> We change the high byte back, which causes the PLA to re-assert CAS.
> we read the next byte.
>
> end of phase 2/dma
>
> --
> Neat idea, but there's just not enough time in 500ns to do it on a
> c64
> clk->caslo is 229ns max
> PLA propogatoin is 80ns max
> ras precharge 80ns
> cas precharge 40ns
>
> clk->cas 229ns
> cas->casram 80ns
> casram->data 50ns (150ns ram)
> cas->casram 80ns
> casram->data 50ns (150ns ram)
> ======
> total 489ns
>
>
>
> The only limitation I can see is not being able to change rows in
> the same
> clock phase.
>
> If this works, a c64 with fast enough ram (150ns FP ram, which is
> standard
> in most) could do 4M/sec when the vicII's completely silent (screen
> off),
> and 2M/sec during non-badline display.
>
>
>
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