Hi All, REC Refresh: Is anyone aware of the memory refresh scheme employed by the REC chips? Is it RAS only, CBR, or Hidden? If its either of the later two, has anyone considered expansions using 1MB chips. VDC Refresh: Apparantly, register 36 in the VDC controls refresh rate. Has anyone experimented to see if increasing the refresh rate will allow larger memory chips to be used? Does anyone know the size of the refresh counter or whether a CBR or hidden refresh scheme is used for these chips. Given they could have been 4464 chips, the newer schemes were know about at the time of the design. - Nick PLEASE TAKE NOTE: The contents of this email (including any attachments) may be privileged and confidential. Any unauthorised use of the contents is expressly prohibited. If you have received this email in error, please advise us immediately (you can contact us by telephone on +61 8 9441 2311 by reverse charge) and then permanently delete this email together with any attachments. We appreciate your co-operation. Whilst Orbital endeavours to take reasonable care to ensure that this email and any attachments are free from viruses or other defects, Orbital does not represent or warrant that such is explicitly the case (C) 2000: Orbital Engine Company (Australia) PTY LTD and its affiliates Message was sent through the cbm-hackers mailing list
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