Hi All,
REC Refresh:
Is anyone aware of the memory refresh scheme employed by the REC chips?
Is it RAS only, CBR, or Hidden? If its either of the later two, has anyone
considered expansions using 1MB chips.
VDC Refresh:
Apparantly, register 36 in the VDC controls refresh rate. Has anyone
experimented to see if increasing the refresh rate will allow larger memory
chips to be used? Does anyone know the size of the refresh counter or
whether a CBR or hidden refresh scheme is used for these chips. Given they
could have been 4464 chips, the newer schemes were know about at the time of
the design.
- Nick
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