RE: 6522 VIA Questions
Date: 2001-08-29 09:55:22

>> >positive half of PHI2. The trick is to slow down the rising edge of PHI2
>> >using the DOT-clock. Connect the DOT-clock to the CLK-input of a 74,
>> This explains why my attempts to interface an LCD controller directly to
>> bus using the 6502 method in the datasheets was such a failure :(

>I used a simpler method of combining PHI2 and _I/Ox to make a latch
>enable signal when I made a 256kB RAM expansion ~15 years ago.

Looking at the MagicDesk and SuperGames schematics the Commodore way seems
to be to do something similar using a 74LS139 chip. Now its clear why!


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