Hallo Nick, > Did I understand mode 2 incorrectly? No. I was wrong. I completely forgot about this mode. > None of the documents I've read describe the "shift" bug, though > I have heard of it. It would be good to know what it exactly is > (will save pulling out many hairs at a later stage!) I found this using GOOGLE with "6522 bug": http://www.classicgaming.com/vic20/melick/6522f.txt http://www.classicgaming.com/vic20/melick/feagans.htm http://www.xs4all.nl/~ganswijk/chipdir/pin/6522.txt My conclusion is that the 6522 works fine as long as you turn of interrupts. > Can you describe this? Aren't all 65xx chips bus /timing compatible? Yes, they are. But the C64 isn't. The addresslines of the 6522 must be valid before the ChipSelect signals and PHI2 are activated. With the C64/128 the VIC-II still commands the addressbus the first xx nanoseconds of the positive half of PHI2. The trick is to slow down the rising edge of PHI2 using the DOT-clock. Connect the DOT-clock to the CLK-input of a 74, connect PHI2 to the data- and CLR-input, tie the PRESET-input to +5 Volt. The Q-output now delivers the modified PHI2. ___ / __|__ / / |_/ Groetjes, Ruud \ \__|_\ \___| http://Ruud.C64.org Message was sent through the cbm-hackers mailing list
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