Hallo Ruud (and thanks!)
>2) "controlled by a line from the peripheral" I'm not sure what you mean,
an
>external signal controls wether the data is outputted or not like a 541 or
>245? If that is what you mean then: no, the 6522 is not able to do that.
But
>IIRC, the 8255 cannot either.
The 8255 in mode 2 allows port A to be in bi-directional mode, that is to
output data when signalled by the Peripheral where as it normally has the
lines in input mode (to avoid bus contentions). Did I understand mode 2
incorrectly?
>3) on FUNET you'll find some docs on the 6522 that can tell you if the
>a doc mentioning this bug. (or am I wrong, Marko ?)
None of the documents I've read describe the "shift" bug, though I have
heard of it. It would be good to know what it exactly is (will save pulling
out many hairs at a later stage!)
> Is either chip more attractive from a C64 interfacing point of view?
The 8255 has 24 I/O lines, the 6522 ~20. But the ones of the 6522 can
progammed individual, the ones of the 8255 only in blocks of 4 or 8.
Remark: nasty habbit of the 8255, reprogramming the direction of a block
resets all outputs :(
>the 6522 a 74 due to the timing
Can you describe this? Aren't all 65xx chips bus /timing compatible?
Regards,
Nick
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