Hallo Spiro, > > any harm be done by writing invalid data to D8..15 the first time? Here I > > merely have the IDE-interface in mind. > > Although I don't know an example, I would *highly* assume so (at least in > respect with compatibility with different cards!). > > Why don't you just start an 8 bit transfer in this case, so D8...D15 will > not contain any invalid data? When the cards activates SBHE, we don't have any choice. The mere I think about it, the IDE-harddisk seems to be the best example to explain the problem. Once initialized you can read one or more sectors by only reading ONE address (the number of sectors * 256) times. But every read supplies the IDE-interface with a WORD. The most simple IDE-interfaces I know only contain a GAL and a buffer so I may assume it has no storing facilities. This simply means I cannot read the low-byte first and then the high-byte as this would mean two reads for the HD. I have been thinking about pulling IORD (L) and then perform the both reads. But then how do I tell the hardware I only want to perform one of those reads and not the other? So a read from the IDE-harddisk gives us a word so we need a latch. Now the following problem: the internal DMA address register can increment or decrement. When incrementing, the word should be read out of the HD when A0 = 0. At the same time the low-byte is stored directly into the C64. When A0 = 1 no read is performed and the stored upper-byte is stored into the C64. But when the register decrements, the word should be read from the HD when A1 = 1 !!! Etc. etc. To make it more exiting: go through the above exercise and now write data instead of reading it. I think we can solve this problem with hardware (I hope). This incrementing/decrementing thing is done somewhere inside the 8237 but as we don't have access to the bit commanding the kind of action, we must spend an external one for this feature. And it seems that, instead of getting rid of a buffer, I gained another one :( Just before sending this mail I thought of something else: with the above mechanism one can only DMA an even number of bytes and then only when starting at an even address. When not forfilling these two conditions, there is a chance the the last and/or first byte, either on the card or C64 sepending on the kind of transfer, is not read/written. This is something the software should take care of as I don't think that this can be solved with HW. But this means that the assembler/compiler must have a kind of "even address" feature. Groetjes, Ruud http://Ruud.C64.org - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi.
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