Re: PC-card - DMA/SBHE
Date: 2001-04-17 04:12:41

On Mon, 16 Apr 101 wrote:

> Hallo,
> I fear I maybe bumped into something that could cause a problem: the SBHE 
> line. This line in combination with A0 tells what kind of data transfer 
> takes place with a 16-bit card:

This table is PERFECT.  Let's not forget it.

> SHBE  A0     Transfer
>   0    0       word
>   0    1       byte on D8..15
>   1    0       byte on D0..7
>   1    1       will never occur says the doc ***
> *** and what about older I/O cards???

Older cards??

> The documents I have say it is an in- OR outputline. I verified this by 
> studying the schematics of the IBM-AT motherboard. This means that a card 
> can steer this line as well. My problem is: I haven't found out when. 
> The only occasion I can think of is during a DMA. So I wanted to have a 
> look at how the DMA is done inside a AT. I know since 1989 that I miss page 
> 14 of the schematic and you may guess what's on that page: yes, you guessed 
> right, the DMA :( Further study lead to the conclusion that it must be 
> during DMA:
> The SBHE is derived from the CPU's BHE-output through a 573. This 573 can 
> be tristated by the HOLDA-signal. This is the same signal that tells the 
> 8237 it can take control of the busses. So from that moment on nothing is 
> driving SBHE except an pull-up resistor. There are two conclusions:
> 1) SBHE is driven by the card.
> 2) DMA is done byte by byte.

I assume option 1, or the 16bit isa would be pointless (and slower than it

> Regarding 1) the next question occured: a 16-bit card expects a 16-bit 
> system to transfer data and will drive SBHE according this expectation. But 
> in our case the C64 isn't 16 bit. And as it seems we cannot control the 

> width of the transfer, I forsee problems :(

Remember our word-wide latch?  Grab a 16bit transfer from the card, and
spend two cycles transferring it, a byte at a time, into the c64.

> Regarding 2) IMHO if it is a 16-bit transfer then the 8237 either does not 
> use A0 or must increment with 2. AFAIK it can't increment with 2. And it 
> has to use A0 as well as it is needed with 8-bit cards. 

My (possibly incorrect) memory of the DMA arch on the PC (from the
programmer/sysadm's point of view): DMA channels 0-3 are 8-bit.  I.e. they
transfer 8 bites at a time.  This would lead me to assume that DMAC 0 is
hooked to a0-a23, and incrementts by one.  DMA channels 4-7 are 16-bit
channels, and transfer 16 bits at a time.  This further leads me to assume
that DMAC 1 is hooked to A1-A23, and increments by 'one'.  This results in
each transfer being a word apart, two addresses in ram.

> I found a 1984 16-bit 4 MB memory card and looked for pins connected to 
> this line using a beeper. I only found inputs. 
> Tried to do the same with some networkcards and an old MFM-controller but 
> ended up in big custom-IC's.
> At this moment I don't know what to make of it. What could help is the 
> missing page 14 of IBM's original schematic of the AT. Can anybody help me 
> in this? 

Post what you find ;)

> Any comment is welcome.

Important comment: Your discoveries, along with ours, are extremely helpful
with many projects.  Not just the isa project. ;)

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