On Mon, 16 Apr 101 g.baltissen@hccnet.nl wrote: > Hallo, You should really note the last person to write something so quotes dont get credited to the wrong person ;) > So IMHO DMA _must_ be an 16 bits process. Then what about A0 becoming "1"? > In that case the D8..15 are read/written a second time. "BUS ERROR". :) I get this lots on macs, and some when running netscape on unixes. A bus error is any attempt to read a word on a misaligned byte (i.e. a 16bit read with A0 asserted). I dont know how we'd treat this though. > The only point of light I see for the moment is that an AT can DMA to an > 8-bit card. So on the motherboard there must exist a mechanism that deals > with the 16-bit -> 8-bit transformation during a DMA. 16bit isa motherboards have 16bits wide ram. :) To do an 8bit dma, the address steps by one per transfer, transferring 8bits each time. 16 bit transfers go 16bits at a time (of course), and increment the address by two. > Hmmm, what about keeping A0 towards the card a "0" when the 8237 outputs a > "1" and copying the upper into/from our own upper-byte register? I'd watch teh SBHE line. My ISA book didnt get any attention this weekend (was too busy with the family), so I cant rememer exactly: I'm fairly sure that the SBHE line is asserted by the busmaster to indicate that a transfer is 16bit. The c64 can simply not assert this and do 8bit transfers TO the card all the time. Also, it applies when reading, so 8bit reads can be enforced. However, I dont believe the same is true for DMA, which is the case we're working on with this thread (?) - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi.
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