Re: Re[2]: Article PC-card

From: Ruud Baltissen (Ruud.Baltissen_at_abp.nl)
Date: 2001-04-06 10:01:39

Hallo Frank,

> No. 6526 has also input data latching.

Would you be so kind to share this secret with us? I read the PRG again but
couldn't find anything mentioning "latch".
Remark: I have the impression that some of the readers mix up "latching"
with "handshaking".

> http://c64.uz.ua/misc/65xxinterfacing.zip

Thank you very much.

BTW: I thought you had an URL of your own?

Groetjes, Ruud

http://Ruud.C64.org


----- Original Message -----
From: Frank Kontros <frank@kontros.uzhgorod.ua>
To: Ruud Baltissen <cbm-hackers@dot.tml.hut.fi>
Sent: Friday, April 06, 2001 9:41 AM
Subject: Re[2]: Article PC-card


> Hello Ruud,
>
> RB> I mean 8 bit transfer to port A of the VIA. AFAIK the 6526 can only
read a
> RB> port, the VIA can latch the data on the port. I intend to use it for
the 16
> RB> bit transfer for an ISA-card: D0..7 are read by the CPU, D8..15 by a
port.
>
> No. 6526 has also input data latching. VIA has also a register w/o
> handshake control.
>
> >> I can dig it up. I even have the working board somewhere with 65c22. I
> >> can send you the scanned pages (in german), that I used for design.
>
> RB> This triggered the thought that the 64'er published an article about
it. But
> RB> which magasine??? I would be happy anyway with the article, thanks.
>
> Okey. I found it. It's not a 64'er article. It was scanned from book.
> BTW, I forgot who was sent to me.
>
> Anyway the zipped pages are just online. You can DL it from:
>
>
> I also checked my schematics and so used only a 1/2 74LS74 to drive phi2
> of 6522 and no more gates for delay.
>
> Best regards,
> Frank
>
>
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