Hi all! I'm currently doing some timing measurements on my Commodore Plus/4. Since I have no digital oscilloscope, I'm using an Atmel RISC microcontroller (an AT90S2313) as an 'intelligent' replacement. This chip is capable of running at the master clock of the Plus/4 (PAL version, Phi0 = 17.73447 MHz) and executing one instruction per cycle :-O so it's pretty ideal for such a purpose (still not mentioning its 16 bit timer with external capture event possibility + the onboard analog comparator ;-) ). Currently, Phi0 is generated by the micro. The clock is either simply passed on, or pre-divided by 2 or 4 before passing to the 8360 TED in the Plus/4. (Have you seen how funny a Plus/4 running at quarter speed is? :-D). Deriving all clocks from one source makes sure that everything is in sync with the others, and measuring the same signal with different divider setting gives some more precision (or gives some ideas on the real operation). I seem to have some ideas on what to measure (should create a listing, but until now the measurement board was not really 'safe', I was rather experimenting...). On the other hand, I'm sure some of you have good ideas, or things that you once wanted to measure but never got around to do it or never had the instrument to do so. Once this thingy was built (some of it, especially the 'divider' 74S74 with the 74F125 on the top on it :-O - kind of spaghetti... ), I guess I'm better doing all possibly important measurements now (since I'll probably take the circuit apart and won't ever feel neccessary it 'enough' to put the components together again). So, if you're interested in some particular data, just tell me your ideas. Current plan: measurement data of the Plus/4, a C64 and a VIC-20 (both in PAL and NTSC modes). I also have an old CBM 4016, but I'm not really familiar with its hardware so I'll probably leave that out, unless someone feels it _really neccessary to join it into the group (that case, also please give me some help on what to measure). Also, I only have the 6567R56A from the NTSC VIC-IIs. I'm willing to make some mesurement docs with this data, probably appearing on Funet someday. BTW I've just found something interesting. The sound output of the Plus/4 is pulse width modulated, the PWM running at the dot clock of the computer. The period is 16 or 32 dot clock cycles when both channels are on or just one channel is on, respectively; (in the latter case, the 'second' of the two phases is kept constant 0, 'halving' the average duty). The duty cycle grows as '1 - 3 - 5... - 15' as function of volume level 1,2,3...8. However, there's something strange: the 'end point' of the duty cycle is always 'late' by the time of approximately one master clock cycle time. This delay is constant, it is not a function of the master clock :-O. Check this. In NTSC mode, dot clock = master clock/2. When measuring the PWM signal of volume level 1 ($ff11=$91), I should get '2' as duty cycle (since my unit is the master clock). Instead, the result is '3'. If I halve the master clock for the Plus/4, I should get two times the previous one, '4' - I get '5' instead. When I quarter the clock, the 'theoretical' result is 8, and I get '9'. ...Should there be an internal delay 'unit' somewhere in this part of the TED? ...It should be something like this, but why on Earth?... Best regards, and tell me your ideas... L. --this message went through the firstname.lastname@example.org emailing list---
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