Re: JIffyDOS Coding

From: Richard Atkinson (
Date: 2001-03-27 15:43:19

On Tue, 27 Mar 2001 wrote:

> Not knowing enough about either the VIC20 or the Plus4:
> 1) are the port locations of DATA and CLOCK signals as convenient as
> are on the C64/C128?

On the VIC20, CLK input is bit 0 of Port A on the second VIA and DATA is
bit 1, but CLK output is CA2 of the first VIA and DATA output is CB2. High
speed loads may be possible, but I suspect high speed saves will not.


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