On 2023-01-12 7:21 a.m., Michiel Boland wrote: > Hi. The PAL VIC-II chip has 9 bits for the X coordinate. That can > accommodate 504 pixels (63 cycles) per line. I would assume that the > NTSC VIC-II also has only 9 bits for X coordinate. Then how does that > chip manage to produce 65 cycles per line? Since 520 pixels would > require 10 bits. That's a good question, and I spent quite a while today looking into it! The "Old NTSC" VIC-II (the 6567R56A) has 64 cycles per line, which would be the limit of the 9 bits: 512 pixels. The newer (and far more common) 6567R8 has 65 cycles per line which as you say would require 10 bits for its 520 pixel x-coordinates. But instead it seems that instead they added extra logic to freeze the X counter for an extra 8 pixels at position $184 (388 decimal). I have no idea how this was done, and I don't see any explanation of it online anywhere. Nevertheless, it's how it was implemented in VICE. See around line 395 in this file, in the definition of cycle_tab_ntsc[] https://sourceforge.net/p/vice-emu/code/HEAD/tree/trunk/vice/src/viciisc/vicii-chip-model.c And compare it with the otherwise similar definitions for the PAL and Old-NTSC VIC-IIs. The 63-cycle PAL definition skips from $1F4, over $1F8 and $1FC to $000 to account for the "missing" 8 pixels compared to the 64-cycle VIC-II. The duplicate X positions of the 65-cycle VIC-II are also shown in the famous VIC-II Article but again don't seem to be explained. They have the VIC-II repeating position $18C instead of $184 but it's otherwise similar. Search for the chart "6567R8, no Bad Line": http://www.zimmers.net/cbmpics/cbm/c64/vic-ii.txt I'd love to hear if anyone has any insights into this. Adding an extra bit to the X position counter probably would have had far more serious design implications compared to this little hack that could have been added to the already extensive group of horizontal screen position decodes; probably a much less intrusive solution. RobinReceived on 2023-01-13 06:00:01
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