Re: Questions about the 8563 / 8568

On 16/12/2022 10:01, Baltissen, GJPAA (Ruud) wrote:
>
> Hallo allemaal,
>
> I was looking at the schematics of the C128 to see how Commodore 
> created the composite signal out of the standard RGB ones.  And it 
> raised some questions:
>
>
> - It is not mentioned or missing on Bo’s site, 
> http://www.zimmers.net/anonftp/pub/cbm/documents/chipdata/csg.chips.info 
> , but does the 8563 and 8568 have different pin-outs?
>
They do have different pinouts indeed. The 8568 has IRQ capability which 
was never added in the ROMs or connected on any 128 board. The 128CR 
board does have the IRQ line going to the VDC via jumper that is not 
connected by default.

> - I only noticed now, and that after 30 years, that I don’t see any 
> character ROMs that provide the 8563 and 8568 with data. Do they have 
> build-in ROMs or am I missing something?
>
As Richard stated, the system character rom is copied into RAM during 
system startup.
>
> - The 8568 has a composite video and sync pin. Does this mean that the 
> DCR outputs a color composite signal?
>
Only monochrome composite.

> - AFAIK the IBM CGA card outputs a color composite signal. Has nobody 
> ever tried to hack the C128 to create one as well?
>
> - Has anyone used the 8563 or 8568 in another (self built) computer? I 
> was thinking about using a 6847 because it doesn’t use memory in the 
> CPU range and seeing that the 8563 and 8568 having this feature as 
> well, I’m thinking using one of them.
>
In theory it should be possible to use the same circuit as on the IBM 
CGA card to generate the colour bursts. I do not know what the effect on 
the colour burst would be from a clock perspective with the 16MHz clock 
of the VDC.

Using a VDC chip in another computer is an idea I've also toyed with. 
The one thing to consider would be the VDC clock at 16MHz, you probably 
want to derive the system clock from the same to avoid the phase issues 
that you have in the 128 where the VDC clock is not locked to the system 
clock.

It might also be possible to run the VDC chip on a different clock by 
setting the display timing registers to match, never tried or looked 
into it.

//Johan