On 22/6/22 21:24, tokafondo_at_tokafondo.name wrote: > YIKES!!! I pressed 'sent' by mistake and didn't had completed the post!!! Remember than RAM is accessed twice per cycle: CPU and VIC-II. If I would design a fast 6502-like accelerator I would interpose a fast cache (write thru with a small (maybe 1-2-4 bytes) write buffer) or, using something like a 65816, fast and exclusive RAM in other banks. Dynamically adjusted 6502 frequency will not get you anything useful, because 6502 do a memory cycle per CPU clock, always, even when not useful at all. Too complicated, too little gain. -- Jesús Cea Avión _/_/ _/_/_/ _/_/_/ jcea_at_jcea.es - https://www.jcea.es/ _/_/ _/_/ _/_/ _/_/ _/_/ Twitter: _at_jcea _/_/ _/_/ _/_/_/_/_/ jabber / xmpp:jcea_at_jabber.org _/_/ _/_/ _/_/ _/_/ _/_/ "Things are not so easy" _/_/ _/_/ _/_/ _/_/ _/_/ _/_/ "My name is Dump, Core Dump" _/_/_/ _/_/_/ _/_/ _/_/ "El amor es poner tu felicidad en la felicidad de otro" - Leibniz
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