I concur. It took me two days sweating over RAM data sheets to identify a modern part from a device supplier to replace a 30 year old part on a card that we are remanufacturing at work to ensure that all of the parameters met the min/max timing. The HOLD time is one if the parameters that can sometimes get forgotten... Faster is not necessarily better... Dave On Wed, 26 Aug 2020 at 08:15, Francesco Messineo < francesco.messineo_at_gmail.com> wrote: > On Wed, Aug 26, 2020 at 9:07 AM Baltissen, GJPAA (Ruud) > <ruud.baltissen_at_apg.nl> wrote: > > > > Jim Schreef: > > > Never thought that buying slower ICs would fix issues,.... > > > > But why does it go wrong? AFAIK the 6502 reads the data at the end of > the upper half of PHI2 and IMHO a faster ROM should not make any > difference. Am I overlooking something? > > > as I have already written in a previous answer in this thread, the > likely problem is hold data time at the end of the cycle (falling > phi2). 6502's datasheet indicates 10ns minimum hold time > on a 1 MHz read cycle after phi2 falling edge. Some fast memories > could have a shorter hold time. > > > HTH > Frank IZ8DWF > >Received on 2020-08-26 10:02:20
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