Re: BeamRacer is coming… request for comments

From: laubzega <mileksmyk_at_gmail.com>
Date: Sun, 31 May 2020 23:47:09 -0500 (CDT)
Message-ID: <1590986829595-0.post_at_n4.nabble.com>
Unfortunately, VIC-II socket does not receive address bus writes on lines A6
and A7. This limits the number of externally-accessible registers to 64,
with the highest register being $(D0)3F, so not much left for VASYL.

Early on we considered using address space of VIC-II mirrors (say
$D100-$D13F). This however results in code with a high potential to confuse:

MOV  $20,$0   ; move 0 to VIC-II register
MOVI $20,$0   ; move 0 to VASYL register

Once you start writing longer programs, the likelihood of mistakes this
causes is growing quickly.

On the plus side, all 64 registers would be bus accessible. Current
implementation has space for 16 bus-accessible and 32 internal registers
(accessible only from a display list).

We are currently analyzing the move of $D030 register to $D03E (for various
reasons shifting everything up by one is not feasible). The downside is that
currently we have a pair of reserved registers at $D00E-$D00F, with some
plans attached to them, and these plans only work if they are a pair. :)




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Received on 2020-06-01 07:00:02

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