Hallo Nick, > Now... 30pin 256kB SIMMS unfortunately generally use two 44256 chips (and sometimes one 41256 for parity). The 1MB SIMMS use either 8 or 9 1MegaBIT chips. The problem in both cases is refresh will not work on all cells. I do have some tech specs of the 44256 and also came to the conclusion that this chip needed 9 refreshlines instead of 8 like the 41256 :( But I wasn't sure until now. An other source pointed me to the fact that some 72 pin SIMM's operated on lower voltages: so even more problems. Designing the circuit is not the problem; you only need two 74LS393's (which supply you with 16 lines) and three 74LS257's. These you need to switch between the original lines and the ones for the refresh. Then you need a circuit to generate a RAS-pulsen during the low halve of CLK2 which does the trick. The only problem of the circuit is that it isn't small. If you want to devellop a complete RAM-expansion, you'll need at least another three 74LS257's to do the multiplexing of the original addresslines. For those interested to see the above in working order: I've seen some VIC-20 RAM expansions using the above principle. Groetjes, Ruud http://home.hccnet.nl/g.baltissen/index.htm - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi.
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