"COPLIN, Nicholas." wrote: > [COPLIN, Nicholas.] Wow... all a lot more subtle than I first expected... > >From testing over the weekend it seems that simply using the 80column mode > on the C128 doesn't disable the VIC-II access either, you need to manually > poke the blanking codes... On the C128 it is even MUCH more sophisticated. Since the 80 column chip is completely independant from the rest of the system, its use does not affect any memory accesses there. The VIC-IIe has two new registers, one of which has a TEST bit and the 2MHz bit. The 2MHz bit disables most of the VIC-IIe's memory accesses (probably it simply tristates the bus), but it does not blank the screen. You have to do that manually. Also, the VIC-IIe will keep doing the memory refresh accesses on each scanline and this causes a slowdown to 1 MHz for I think five cycles on each line. The effects of the TEST bit on the memory accesses is a mostly unexplored story, only recently it was found that its use has effects on some internal counters, which makes the manipulation of video timings possible. Nicolas - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail email@example.com.
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