6526 question for y'all

From: David Ross (watson_at_enteract.com)
Date: 2000-11-10 17:39:43


I've got a question about the 6526 CIA that maybe someone could shed some
light on (and I'm sure many more questions coming soon)...

The block diagram in the 6526 datasheets (and the version of the datasheet
in the 64PRG) shows buffers on several of the I/O lines.  But the
functional description only alludes to buffers on the data bus lines.

What is the purpose of the buffers on the other lines?  Do they work in
the same manner (high-impedence input unless CS is low, and R/W and Theta2
are high)?

Also, does the chip only respond to signals, such as FLAG, when Theta2 is
high?  Again, the datasheet says that "any negative transition" of FLAG
will set the FLAG interrupt bit to 1.

Dave R.

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