6526 serial register

From: Michał Pleban <*lists_at_michau.name*> Date: Mon, 28 Oct 2019 11:48:29 +0100 Message-ID: <5DB6C77D.3060409_at_michau.name> · lists_at_michau.name

Hello!

The 6526 datasheet says that the maximum speed of the shift register is
PHI2/4, but it is not clear whether it means it only in output mode
(because the serial clock rate is tied to timer B, and this is the
highest frequency you can get from it), or also in output mode. Does
anyone know what is the real maximum rate in input mode? If I have a
2MHz CIA, would it be safe to assume that it can accept an input clock
in the 2MHz range?

Also, is there any method to reset the shift register to a safe state?
Because if there is not, then any spurious pulses on the CNT line could
make the shift state go out of sync without any means to restore it?

Regards,
Michau.