Re: C64 MMU POC

From: Jim Brain <brain_at_jbrain.com>
Date: Mon, 30 Sep 2019 15:08:28 -0500
Message-ID: <7834d81e-5a58-a36b-4125-5a28b753b590_at_jbrain.com>
On 9/29/2019 7:04 PM, Nejat Dilek wrote:
> If it's a cartridge thing I would just use solely IO1 or IO2 space
> since it's user's responsibility to choose the compatible hardware
> along with compatible software. If that's not the case then a stealthy
> approach could be waiting for a correctly timed sequence of writes. I
> successfully implemented it in my EasyKernal and IRQHack64 projects. A
> short period between two memory accesses to certain address/address
> area represents 0, a long period between two memory accesses
> represents 1. Hardware is not activated until it gets 24 bit of
> information right which is impossible (almost) with the legacy
> software. I did this with an AVR part but this can easily be
> implemented in vhdl too I guess.

It is not a cartridge option, so I think IO1/2 is not a good choice.  It 
is entirely possible that a cart will be inserted at the time this 
additional memory is accessed.

Special timed writes/reads are fine to unlock the register space, but it 
would not make sense to set all of the registers in this MMU via that 
mechanism, due to the number of addresses to change and the frequency of 
changing them.


Jim


>

-- 
Jim Brain
brain_at_jbrain.com
www.jbrain.com
Received on 2020-05-29 22:39:00

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