On 7/10/2019 1:32 PM, laughton_at_cyg.net wrote: > > Sorry to tease everyone -- it was the '816 I was thinking of. My > notion was to run it in parallel with the 6510, not to replace it. In > other words, the '816 address bus etc would connect to nothing, but > during reads (code fetches) its data bus would have the 6510 data bus > copied to it. Then the oh-so-convenient VPA/VDA signals will reveal > when the opcode fetches occur. > As SMF notes, illegal but non "JAM" opcodes will cause the CPU to desync. Maybe using a NMOS 6502 would work for the approach, but that requires finding a NMOS '02 JimReceived on 2020-05-29 22:29:02
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