Den Thu, 21 Jun 2018 12:13:39 -0500 skrev Jim Brain <brain@jbrain.com>: > On 6/21/2018 10:55 AM, Mia Magnusson wrote: > > No, you also have the option of following the CPU activity and thus > > be sure that you don't start the DMA in a state where there is a > > risk of unwanted extra accesses to the I/O addresses. Worst case > > that would need half of a 6502 core in programmable logic but it > > must be possible to simplify this a lot. > I think this bears figuring out. Given an assumption that your logic > will see all of the same data as the 6502 core, what is the simplest > logic configuration that would generate a new SYNC signal. > > Seems like a nice logic puzzle. Not sure how much is required. How big is the smallest 6502 implementations you can use in programmable logic? Far too big for the cplds we are talking about here? -- (\_/) Copy the bunny to your mails to help (O.o) him achieve world domination. (> <) Come join the dark side. /_|_\ We have cookies.Received on 2018-06-23 07:00:04
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