Re: DMA successes with Verilog

From: Mia Magnusson <mia_at_plea.se>
Date: Wed, 20 Jun 2018 01:56:21 +0200
Message-ID: <20180620015621.00000e3d@plea.se>
Den Tue, 19 Jun 2018 09:35:02 +0100 skrev smf <smf@null.net>:
> On 16/06/2018 20:34, Spiro Trikaliotis wrote:
> 
> > What about JSR (two consecutive pushes), or an IRQ, NMI or BRK
> > (three consecutive pushes)?
> 
> Isn't that safe because the first write to the stack is followed by a 
> further write to the stack?

Yeah, I haven't heard of any C64 expansions that put I/O in $100-$1FF.

On some other 65xx board it might make sense though. Like use a 6532
and map 128 bytes of ram and I/O both in page 0 and 1, so the code can
choose to use the ram as either stack or zero page ram as fit and for
hardware simplification reasons the I/O might end up in both areas. But
it would be hard to find any reason for using the stack pointer to
write to I/O, especially using a jsr, irq, nmi or brk to do that. :)
 
> What circumstance do you get a write followed where the next address
> is going to be I/O?

One single write can of course occur anywhere.



-- 
(\_/) Copy the bunny to your mails to help
(O.o) him achieve world domination.
(> <) Come join the dark side.
/_|_\ We have cookies.
Received on 2018-06-20 02:00:06

Archive generated by hypermail 2.2.0.