Re: Wireless - switchless kernal mod

From: Nejat Dilek <imruon_at_gmail.com>
Date: Tue, 3 Apr 2018 16:42:07 +0300
Message-ID: <CAP5r8NQaY3YZPmb+suS8W17i8w_4EXzbVn55mqqjBfy8HAMMuA@mail.gmail.com>
On Mon, Apr 2, 2018 at 5:33 PM, Jim Brain <brain@jbrain.com> wrote:
> On 4/1/2018 5:15 PM, Nejat Dilek wrote:
>>
>>
>> Receiving side will try to receive a byte if timing requirements are
>> met, if not met then it will discard it.
>
> I know the ATMEL8 uCs have an external interrrupt pin that ties to the
> timer.  When activated, it automatically stores the current timer value and
> then calls the IRQ routine.  If your ATTINY has it, I'd recommend using it.
>>
>>
> Jim
>

Unfortunately I did a bad selection of choosing the pins for my
prototype design. For the Attiny85 most versatile pin for interrupt
handling seems to be PB2 pin which on my design tied to Eprom SEL2
line. Pin change interrupts are available on all pins but they trigger
on both edges of a pulse which would be tricky.

Still I'll rewire the SEL2 line to another pin on my prototype and use
PB2 as an INT0 interrupt source. I've only a few pcbs produced so it's
ok to change the design.

https://www.avrfreaks.net/forum/attiny85-external-interrupt-help

I couldn't find information about that behaviour you described,
possibly attiny85 doesn't have it. I'll possibly stop / start an
internal timer to measure time.


On Tue, Apr 3, 2018 at 9:31 AM, Baltissen, GJPAA (Ruud)
<ruud.baltissen@apg.nl> wrote:
> Hallo Nejat,
>
>
>> The program on the attiny side continously samples one of the address lines and tries to sync to this pilot signal.
>> After syncing, which is assumed, c64 program sends the chosen eprom bank for the selected kernal. Attiny receives this and switches the kernal.
>
> I beg your pardon but isn't this a bit far sought? What about piggybacking a 6526 on top of an existing one? With a 74LS139 you can either demirror one of the existing 6526s, VIC and/or SID. (Or use IO1 or IO2 to address it but then you'll lose some functionality).
>
> The biggest advantage of this solution IMHO: there is only one CPU you have to program for, thus only one source of possible trouble.
>

Well actually later I simplified it a bit. It became a sort of one
wire protocol.

If the user of this hardware would just be me then these sorts of
hacks would be appropriate.

I plan to share this hardware in my community. It would be a bit
overkill for everyone to piggyback a rare item like a 6526 :) Even
with this design one should desolder the existing rom chip and install
some kind of headers to put the new hardware in place.

As noted a simple port access would easily turn into a compatibility
problem for certain software since it has a broad effect of switching
a kernal.

Regards,

Nejat
Received on 2018-04-03 16:00:02

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