On 2/25/2018 2:25 PM, Francesco Messineo wrote: > I don't think that's the main difference, that's a read maybe from > RAM? I don't really know what's mapped at $03FA (I wish I had a > CBM-II), Not sure either. I thought it was RAM, and I assumed it might be something that changes from boot to boot, but the 6509 always reads the one value, and the 5402 always read the other. > Maybe some missing synchronism on > your analyzer setup? Well, it's always possible, and I can flip the clk trigger to the other edge, but I don't change the analyzer setup between the 6509 run and the 6502 run, so one would assume if one is right, they both are. > Step 0022, A contains #06, it has been loaded before with A9 06 (LDA > #06) then there a STA $96 (85 06), so step 0024 is the actual write > and it's correct on the 6509 side (address 0096, data 06) and wrong in > the 6502 side (address 0096, data 96). Which implies ot me that the 6502 core int the 6509 is shifted in the execution (using PHI1?, not sure) Right now, I have the LA triggering on rising edge. I agree it should be falling edge, but when I do that, I never see a $91 or $b1 opcode before the PORT address changes, but when I use rising edge, I see them. I am using an HP1650, so I think the LA is up to the task. > So there's something really wrong on what is put on the data bus > during on a write. I can switch back to falling edge and redo the tests. Jim Message was sent through the cbm-hackers mailing listReceived on 2018-02-25 22:01:29
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