Den Tue, 20 Feb 2018 19:28:23 +0100 skrev Gerrit Heitsch <gerrit@laosinh.s.bawue.de>: > >> On 02/20/2018 11:53 AM, Francesco Messineo wrote: > >>> Hi all, > >>> in case someone doesn't read vcfed forums, my 3032 developed a > >>> strange fault: > >>> > >>> http://www.vcfed.org/forum/showthread.php?62202-3032-(2001N)-strange-fault > >>> > >>> The thread link is just to recap what I've found and what I did, > >>> so I don't have to type all again here ;-) > >>> Ideas welcome, I'm just scratching my head. This is probably > >>> where a logic analyzer is needed badly. > >>> It seems to me there're unintended writes on some ram locations > >>> (not so random, address wise) and it makes me think about VSP > >>> crashes on C64. > >>> Any idea where to look for a fault? It seems like there is a correlation between many but not all 1's in the addresses and some data bits changing from 1 to 0. I'd look into decoupling of both the DRAMs and the IC's that drive the signals to the DRAM's. Also the actual DC voltages could be interesting. Those old DRAMs use three different voltages, easy to miss a glitch in some voltage. Remember that the oscilloscope usually has signal ground connected to protective earth ground so there might be some limitations in what you can measure with a single probe. It cannot hurt to improve decoupling on the power rails even if the power rails looks good on your oscilloscope. I haven't much experience with DRAMs but from what I've read you'd really need a 500MHz oscilloscope or similar to be able to really see all kinds of glitches, so with a more common slower oscilloscope you are a bit blind. Not sure which state the adress lines have before the mux:es switch to a read (and if the inputs to the mux:es are stable before the mux switches), but many lines switching states causes a spike on the power rails. Also if there is something suspicious with dram refresh, the ram would (afaik/iirc) anyway partially get refreshed by normal reads. Basic and Kernal uses a bunch of addresses <1024 (zero page, stack and other stuff) which could mean that most but not all of the 128 different combinations of A0-A6 gets read at some point either in the loops running while idle or running a basic program and in the interrupt handlers. There is afaik some test programs that you can burn onto an eprom and run. (I assume that you already know this, though). > But if the address bits changes too close to /RAS going low, it can > happen that you get 2 or more rows selected at the same time. Meaning > each read amp finds itself connected to 2 or more memory cells. If > those cells don't have the same data (*) in them, you will get data > corruption when the data is written back. In this case where AA should be everywhere, it's probably more a case of only one cell getting written back after two were drained. P.S. Isn't chop mode of an analogue oscilloscope far too slow for this? I've actually used two resistors to be able to look at two digital signals with only one input active on the scope. Not perfect but you get rid of the chop/alt problem. -- (\_/) Copy the bunny to your mails to help (O.o) him achieve world domination. (> <) Come join the dark side. /_|_\ We have cookies. Message was sent through the cbm-hackers mailing listReceived on 2018-02-20 22:02:35
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