Re: testing 6550s outside a 6502 bus

From: Francesco Messineo <francesco.messineo_at_gmail.com>
Date: Thu, 4 Jan 2018 19:08:35 +0100
Message-ID: <CAESs-_yn+38O7qwguznFHabPVsJT=GR=FcecwFZ=8MqTVdVqVg@mail.gmail.com>
On Thu, Jan 4, 2018 at 7:00 PM, silverdr@wfmh.org.pl
<silverdr@wfmh.org.pl> wrote:
>
>> On 2018-01-04, at 18:56, Francesco Messineo <francesco.messineo@gmail.com> wrote:
>>
>> Did anyone succeed in reading/writing these outside a 6502 bus?
>> We can continue in private chat if anyone...
>
> It's interesting. Please continue here.

well, if someone succeeded and can share some ideas... I've tried to
reconstruct a quite relaxed read and write cycle, more than 500 ns
wide (phi2 H pulse), but I don't leave phi2 running as in a real 6502
system, I just pulse it once per cycle when I need a read or a write.
Reading is quite unreliable, and I'm sure most of the 6550s are enough
good to live in the video RAM of this 2001 I'm working on without
showing problems (it's not going past the video ram inizialization, so
I can't test the rest of the 6550s in their place for now).
I don't see any reason why I should have a "real" running PHI2, but
maybe that's just me.

Frank

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Received on 2018-01-04 19:00:37

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