> On 2017-11-07, at 09:46, Mia Magnusson <mia@plea.se> wrote: > >> That's exactly what I understand Mia wrote and I rephrased: "Meaning >> you have to slow down or speed up the Amiga clock and wait for the >> syncs to align their phases. This takes time. Not much but still. >> Then you need to constantly monitor the two for drifting and react >> accordingly by either speeding up or slowing down - basically a form >> of PLL." > > Really old tellys, like from the time where active components were > expensive (valves/tubes and the early transistor TV's) almost did that. > But it usually took far less than a second. Although there were no > pixel clock, they slowly synced up their local oscillators for hsynk > and vsynk and you could se the picture roll around for a short moment. > >> If that's how it actually works then I stand corrected. I (and as I >> understood smf too) thought it was done by supplying the reference >> pulses to Amiga so that it "knows" when to start the line/field. I >> thought that was the purpose of having the possibility of sync pins >> to act as inputs. > > I thought so too before I got hold of an actual genlock. :) So you _did_ check it, right? Well.. then I stand corrected, indeed. -- SD! - http://e4aws.silverdr.com/ Message was sent through the cbm-hackers mailing listReceived on 2017-11-07 09:01:05
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