> On 2017-11-05, at 21:57, smf <smf@null.net> wrote: > >> Theoretically looks like you could probably do this (and then constantly monitor for drifting and react), but the questions are: >> 1) why make it more difficult and expensive while at the same time potentially less reliable and slower to lock? >> > It is essentially what I described a while back for making c64 output a valid pal/ntsc signal while maintaining perfect sync between the cpu/sid & vic, by speeding up/slowing down the system clock to make the sync pulses hit at the correct time. I remember this idea, which revitalised my enthusiasm for a moment ;-) Next to make it on time, you still need to wipe and reconstruct the odd/even pulse sequences though. > I wasn't considering syncing to an external sync, which would add some complexity. But it would be an awesome project. For engineering fun - sure :-) -- SD! - http://e4aws.silverdr.com/ Message was sent through the cbm-hackers mailing listReceived on 2017-11-05 22:01:50
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