On Saturday 18 February 2017, 08:24:26 smf <email@example.com> wrote: > On 17/02/2017 20:26, Gerrit Heitsch wrote: > > That can be fixed by using a static RAM instead of DRAMs. > > It can be fixed by latching signals as well. > > My point is that a 100% VIC II in an FPGA would have the VSP problem, or > it's not 100%. AFAIK vice doesn't have the VSP problem either. actually x64sc can emulate it :) (its optional, "VSP Bug Emulation" in VICII settings) and no, the problem can _not_ be fixed (only) by using SRAM - that was tried and proven wrong long ago. its an urban myth that doesn't want to die :) it might do the trick on a particular board, but then its just pure luck and replacing the DRAMs by other DRAMs with slightly different timing (eg from another vendor) might "fix" it just the same. -- http://www.hitmen-console.org http://magicdisk.untergrund.net http://www.pokefinder.org http://ar.pokefinder.org Ich ahne, wovon ich spreche, meine Damen und Herren. <Angela Merkel, CDU> Message was sent through the cbm-hackers mailing listReceived on 2017-02-18 09:00:38
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