Re: Switchless ROMs

From: Hegedűs István <>
Date: Tue, 3 Jan 2017 17:27:23 +0100
Message-ID: <>

I am using Xilinx FPGAs (Spartan 3E, Spartan 6) and they don't have ROMs. 
They load the configuration from an external flash chip at power on.
I don't see any problem with using RAM for ROM content. The Papilio Pro 
board has 8Mbyte SDRAM which is way much more than we need in a 8 bit 
computer. My sdram controller uses half of it for RAM the other half for 
ROM. ROM is writeable only for the bootstrap logic, TED anyway doesn't 
assert cs0 or cs1 when a write happens to a ROM address so the Plus4 will 
never write to it.

The Papilio Pro's board has larger SPI flash chip than Spartan 6 needs for 
its config thus after the FPGA code user data can be stored. I am storing 
ROM images there and the bootstrap part uploads it to sdram at startup (in 
theory I could use the flash chip on the fly for ROM reading but I don't 
like that solution).

The FPGA internal RAM I am going to use for a scandoubler. It is static ram 
and fast.


-----Original Message----- 
From: Michał Pleban
Sent: Sunday, January 01, 2017 11:50 PM
Subject: Re: Switchless ROMs


Hegedűs István wrote:

> The FPGA doesn't have much RAM so there is no point in using it to store
> ROM images.

But ROM and RAM on FPGA are different things. You should not, of course,
use RAM to hold ROM contents, but it should be perfectly OK to use ROM
to hold ROM contents. I don't know what kind of FPGA you are using, but
for example Altera 10M02 has 12 kB of RAM and separate 12 kB of ROM,
which is most likely too small for your purposes, but bigger chips have


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Received on 2017-01-03 17:00:02

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