Re: Switchless ROMs

From: Jim Brain <brain_at_jbrain.com>
Date: Wed, 28 Dec 2016 11:34:19 -0600
Message-ID: <8d41f165-003d-89e7-4e52-dfdea14214f4@jbrain.com>
On 12/28/2016 10:06 AM, Gerrit Heitsch wrote:
>
>
> You can do that, yes, since VIC will not access the KERNAL ROM. But 
> you still need to take the possibility of a badline in the middle of 
> the vector fetch into account.
I don't think I do.

access $fffd (jmp)
<lots of time elapses for VIC badline>
access $fffd (low byte of vector)
...

 From the logic's point of view, they are two consecutive reads from 
ROM, regardless of the time elapsing between them. So, as long as you're 
not depending on timing, but rather a state machine:

if (!oe and state = 0 and $1ffd) state = 1
if (!oe and state = 1 and $1ffe) state = 2 else state = 0
if (!oe and state = 2 and $1fff) state = 3 else state = 0

Seems like it would work.  Of course, you have to ensure that all reset 
vectors in the ROMs you are using are valid targets in the "boot rom", 
since the CPU could fetch any of the vectors, depending on which ROM is 
active, but that seems OK.

Jim

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Received on 2016-12-28 18:01:36

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