Re: Switchless ROMs

From: Gerrit Heitsch <>
Date: Tue, 27 Dec 2016 17:36:13 +0100
Message-ID: <>
On 12/27/2016 11:56 AM, Michał Pleban wrote:
> 1. Have the CPLD check for reset vector access, that is, for a fetch
> from $FFFC immediately followed by a fetch from $FFFD. This will catch
> the reset sequence as well as JMP ($FFFC) which is also a kind of reset,
> but it will not catch other accesses to the vector like LDA $FFFC.

Don't forget that CPU memory access is interleaved with VIC. So you 
won't see an access to $FFFC immediatly followed by an access to $FFFD, 
there will be at least one access to wherever inbetween. If you're 
unlucky and catch a badline there will be more...

In order to filter out the CPU accesses, you will have to also look at 
AEC, RDY and PHI0.


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Received on 2016-12-27 17:00:03

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