Re: MAX Machine PLA equations

From: Michał Pleban <lists_at_michau.name>
Date: Sat, 06 Aug 2016 18:13:40 +0200
Message-ID: <57A60CB4.6020902@michau.name>
Hello!

Segher Boessenkool wrote:

> Right, that makes sense...  Except SID is treated "properly"!

Yes, that's true. But maybe it's because they wanted to make SID write-only?

It's hard to explain it. When I hook up the GAL instead of 6703, we can
try to see if "fixing" the equations makes any difference - maybe
there's some reason to them, or maybe not.

>> Maybe that's not very relevant, since the VIC memory map seems to
>> repeat itself every 16 kB.
> But not the 6703 equations!

They do with regard to RAM and ROM. The IO chips are an anomaly, but
they don't overlap with RAM and ROM in the VIC memory map. So maybe
nobody bothered to fix the equations for them.

It would be interesting to write some software which tries different
settings of VIC registers to see if it really "sees" these chips. Plus I
still don't know what drives the A15..A14 lines on VIC access - are they
just left floating?

Regards,
Michau.

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Received on 2016-08-06 17:00:02

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