Re: CPLDs/FPGAs toolchain

From: Jim Brain <>
Date: Fri, 22 Apr 2016 23:12:17 -0500
Message-ID: <>
On 4/22/2016 4:41 PM, wrote:
>> On 2016-04-22, at 18:52, Jim Brain <> wrote:
>> I will admit that strategic and timely help from a few knowledgeable people who knew more about HDL than I was immensely helpful.  I am happy to pass on that help, because I am now pretty comfortable with the toolchain (Verilog, still learning, as I am still messing up when to use reg or wire)
> One of the n00bs question is: are the HDL designs transferrable (capacity permitting) between FPGAs and CPLDs? And another one: are those transferrable (when common language like Verilog or VHDL is used) between chips from different vendors?
Transferring from CPLD to FPGA is pretty easy.

I'd recommend staying away from special vendor specific constructs is 
possible and letting the tool infer the gates you need.  If using a 
specific gate is unavoidable, wrap it into a library that can be 
abstracted from the design.


Jim Brain

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Received on 2016-04-23 05:00:19

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