On 02/23/2015 09:36 AM, Baltissen, GJPAA (Ruud) wrote: > Hallo Gerrit, > > >> Well. it should be... > > Just did dome googling and it seems I was wrong for all these years. But then again, why is the delay R/W signal at the beginning needed? To make sure the addresses are really stable I'd think. Remember that PHI2 is slightly delayed compared to Phi0. The RAMs can get away without that delay since they don't care about addresses for writing until _CAS goes down which is rather late in the cycle. The CIAs use PHI2 directly. Gerrit Message was sent through the cbm-hackers mailing listReceived on 2015-02-23 11:00:04
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