Re: TED bug?

From: Gerrit Heitsch <>
Date: Thu, 06 Nov 2014 18:35:18 +0100
Message-ID: <>
On 11/06/2014 11:50 AM, Istvan Hegedus wrote:
> Hi All,
> I am doing some analysis of TED using a logic analyzer and faced a
> strange behavior, most probably bug in the chip design. I am wondering
> whether anyone has noticed it or not.
> At the moment my interest was in the behavior of TED regarding the STOP
> bit. What happens when I stop the display chip. Documents says TED will
> stop but still provide ram refresh. What I have seen however surprised me.
> When TED behaved in the expected way, it run single clock and started to
> toggle AEC. During phi0=0 it has done the ram refresh, increasing
> refresh counter cycle-by-cycle so this refresh differed from the normal
> 5 rows refresh per raster line. However depending on when I started my
> little code TED sometimes did not start AEC toggle and forgot the ram
> refresh totally. Only CPU was running. After stopping with run/stop
> reset I could see that the ram has forgotten my code so refresh did not
> happen.
> Has anyone noticed it? This means this stop feature could not be used
> for fast code running because ram refresh would not be guaranteed.

I haven't seen this problem, but may I ask why you'd want to use the 
STOP bit at all? If you want better than normal speed, just allow TED to 
double clock the CPU and disable the display. This should run the CPU on 
double clock all the time (except the 5 refresh cycles per scanline). 
You only get to see the border color though.

If you're on a PAL system and want even better speed while not caring 
about the video output at all, disable the display and then switch TED 
to NTSC. This changes the clock divider from 10 to 8 which will run the 
CPU on a PAL system on about 2.2 MHz. This assumes that the rest of the 
system can keep up and the CPU is well cooled...


       Message was sent through the cbm-hackers mailing list
Received on 2014-11-06 18:00:03

Archive generated by hypermail 2.2.0.