On 06/10/2014 06:51 PM, Martin Hoffmann-Vetter wrote: > So you have two problems to resolve. First you must find out how to put the > correct program data to the port C when you are in test mode. What happens > with the write memory access? So if you can write a small program into the > internally ram, the next question is, how to start this program. The data sheet says all memory _fetches_ are redirected, I read that as 'writing to memory still works'. After all, the data sheet claims that all 6500/1 are tested that way at the factory. The only way I can see to start that program is to feed the necessary JMP instruction and then return RESET to +5V at the right moment after supplying the last byte. The catch is the meaning of 'the right moment'. Also, the program should avoid using the stack since the datasheet doesn't really mention how the stack is mapped and you might overwrite your program. > I think this is a nice project. So it's possible to use an AVR to sequence > the program to port C and store an other program into the internally ram. > After swaping the execution of the programs, the AVR can take the rom dump > and store it or send it via serial line. Remember that the external clock is divided by 2 internally and that the datasheet claims that minimum clock is 200 kHz. Seems to be the standard 6502 core with its 100 kHz minimum clock and not a fully static design. Gerrit Message was sent through the cbm-hackers mailing listReceived on 2014-06-10 18:00:02
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