On 2014-02-27 at 08:36:20, Nate Lawson (nate@root.org) wrote: >>>> The fun part is, if you look at a chip itself and measure just >>>> between +5V and GND of that chip, everything is a bit noisy, but not really >>>> bad. >>>> It's just that the ends of the board in relation to each other do >>>> funny >>>> things. The 1V peak-to-peak is only a few ns, and a half cycle is >>>> about 500ns. > >> Well, this doesn’t mean such thing can be “written off” due > to the length of the pulses. Of course it depends on various things > but it still can be a disruptive factor for regular operations > even if those are short. > > > > Also, remember, the image I mailed you shows the difference > in GND potential between the 2 points far away from each other. > When you take a closer look at Vcc and GND on each IC, it's still > noisy, but a lot less so. > > Sounds like ground bounce, possibly solvable by finding the > responsible line drivers and providing decoupling caps. We just talked it also off the list. It seems to be aligned with _CAS and so the DRAMs seem to be the culprit. And I just wrote about the caps that I thought were there mainly to prevent such things :-) -- SD! Message was sent through the cbm-hackers mailing listReceived on 2014-02-27 11:00:04
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