Re: 264 series questions

From: Levente Hársfalvi (Levente_at_terrasoft.hu)
Date: 1999-10-05 23:06:29

Hi!



Several replies in one...

> I'm sure you could have, but actually what Marko was referring to, happened
> on
> the Plus4 mailing list, and has been proved by me....

O.K.

> And there is also a way, to have both TED and CPU drive the address bus
> at the same time, so both are active.[...]
> This happened to me by accident, and actually haven't got the time, yet to
> investigate, how it's reproducable....

Me too; unfortunately, lost the routine. I fiddled around with $ff1e
tricks by the time.

[patents]
> But I have them on my hard disk, so you can ask
> me for them if you don't want to use the slow IBM server. 

Please send a lot of them to levente@pc1.apaczai-dvar.sulinet.hu (I can
then copy the stuff directly to disks from the server instead of
downloading either from an ISDN or a phone line).

I don't currently know what to do with them, but I'll be interested in
reading them and/or converting them to some other _more_readable formats
if I can.

I changed workplace with this week Monday; I left the school I've been
working last schoolyear and started civil service (instead of military
service) yesterday. I expect a lot more of freetime from this change...
>From the other hand, my Internet access became quite restricted; these
people in the local government where I work are rather interested in
their office work and in playing around with each other's interest
(...based on money, of course ;-) ) than actually supporting wide
Internet access for the employees. Hope I can step this over by visiting
the school, where I can do such activities. Finally, I have this e-mail
access since two years (this is my own; I can tell, I lost simply no
letters because of my ISP during this time). This is stable, but I have
to download all stuff either by modem or the school's ISDN connection.

>  Since the TED only has 57 single cycles per line as
> opposed to the 63 or 65 of the VIC-IIe, the refresh cycles are a real
> nuisance when writing copper effects for double clock mode.  Levente once
> sent me a nice DYCP copper scroller that had broader "pixels" (generated
> by changing the background color) near the right border.

BTW, when speaking of such scrollers, Tibor has coded one far before me
(...maybe, shown in Digital Dream demo?... no matter, me also did some
splitted raster work in around '89 or '90, but released much later). But
that should have ran in single clock mode. 

> I know. But on the C128 it's even worse than this, because clock
> stretching occurs on only some I/O accesses. So you never really know if
> an I/O access at 2MHz speed takes one or two cycles.

Huh, strange. That should involve some more clock logic than the Plus/4
utilitizes.

> The 264 design
> doesn't seem to suffer from this, but then it has that weird Phi2 clock
> which must make it nearly uselees to use 6522/6526 timers there. No
> wonder the timers are in the TED. 

One interesting thing in this subject is the SID card, designed and
manufactured by Christian Schäffner. This has a real 8580 SID that runs
at the constant single clock of the Plus/4. The card picks the MUX
signal, that I should have mentioned that runs @ the constant twiee
clock somehow, then divides it by 2 in a CMOS 4520 chip and feeds this
clock to the SID clk input with no additional fiddling. And,
interestingly, the SID works! I won't have expected such hack to work,
knowing the chaotic state of the Plus/4 internal bus and timings. Even
the readable registers of the SID can be accessed without problems.

The answer is, maybe, that unlike other Commodore peripheral chips, the
SID latches are not so much dependent from the clock signal than the
6522 or the 6526 internals are. Maybe, Bob Yannes re-designed
everything, including port data latches (that anyway, act really strange
in behaviour in opposition to them) and haven't even seen the 6522 or
6526 portchip design...

Ah, and another. I recently talked with Balázs Szabó, BSZ of NST who
also made some hardware hacks. He once designed an IEEE interface for
his Plus/4 (I have the schematics, but unfortunately, the modified
Kernal I do not :-( ). With his interface, according to him, his
computer was able to communicate with his SFD-1001. He told me, he used
a 6821 PIA without problems.


L.


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