Commodore LCD

From: Gábor Lénárt <>
Date: Thu, 28 Nov 2013 07:01:28 +0100
Message-ID: <>

It seems the mailing list "has kicked" me some months ago and I've even not
notice it since about the time of my son's birth :-@ Now I've resubscribed
but I guess my mail was not sent on the list (it's also not in the archive),
so I post it again.  If it has already been received then sorry for the
noise again ... Thx!

----- Forwarded message from Gábor Lénárt -----

Date: Tue, 26 Nov 2013 11:00:22 +0100
From: Gábor Lénárt
Subject: Commodore LCD

Hi All,

I've just discovered the Commodore LCD (CLCD) which attracted my attention. 
I saw the PDF and noted the existence of the ROM images on-line, even saw
the thread about CLCD here, on this mailing list (which actually happened
some years ago).  It seems I missed all of these mailings & information in
the past and now I behave like a newborn baby wondering because of this
"newness" in 2013 :)

Is there any new information since then? A quick look on that PDF and the
ROM images made me sure that they're totally different things; for example
the specification (in that PDF) mentioned an I/O area at $D000, while the
disassembly of the ROM seems to use two VIAs at $F80X and $F88X and an ACIA
at $F980-$F983.  Just by displaying (as ASCII chars, but probably they are
PETSCII, not so important at this point though) values written to $FA00 in a
simple 65C02 emulator hacked together by me can produce readable text like
"COULD NOT RESTORE PREVIOUS STATE" or so, it must be that "LCD controller"
or such.  The kbd scan routines uses port A of VIA1 to select keyboard rows,
and the uses the VIA's shift register to read.  Timer1 of VIA1 is used to
generate IRQ at a rate of 60Hz. Btw, the PDF wrote about two 6524s but
according to my understaing, the actual ROM code indicates they are 6522
VIAs (and also at totally different address, as I've already mentioned) or
something similar at least.

This is what I could figure out (till now) by reading the disassembly list
of file kizapr-u102.bin, and by using the emulator with logging every
opcodes the CPU would execute (by just assuming that lower 32K is RAM,
and the upper 32K is the ROM file, with the mentioned I/O devices at the
given addresses - since I don't know anything about the MMU, the PDF seems
not to be correct at all, it must be about a planned machine not the actual
one used this ROM image at least).

I'm curious if anybody knows more (other than having that PDF and the ROM
images) on this planned machine. Probably I've also missed others' work
on this topic, and I should not rediscover everything myself, I am not so
good in reverse engineering others' code :) And of course I haven't got the
actual machine to try things out (well, I would be rich if I have one ...).

Btw, the PDF I talked about:
And the ROM images:

Any new information other than these (even just some sentences) can be


----- End forwarded message -----

       Message was sent through the cbm-hackers mailing list
Received on 2013-11-28 07:00:09

Archive generated by hypermail 2.2.0.