On 2012-10-08, at 20:25, Gerrit Heitsch wrote: >>> From my checks with a scope, the _CS line for the Char-ROM is the slowest of them all, going LOW about 200ns after PHI0 goes LOW, so with a 150ns EPROM, you should still be OK >> >> I use 200 but tried with faster one too. > > Still, 200ns should be OK, but getting close with respect to Char-ROM access. On the other hand, I currently use a 2532-30 as a Char-ROM replacement and that one works. > > >>> and from the picture you posted, you still get correct looking chars so the EPROM access in general works. >> >> "Jein".. The characters in the case when the striped IDE64 picture is displayed can look all good or can also jitter on the edges. Interestingly only/mostly on the left side of the screen. Especially when switched to the DIN charset. So it works also "sort of" > > Yes, but they can be stable. Also, that striped screen is done by CPU, so that the system itself is running. CPU is working all the time. It is the ROM that gives sometimes invalid data it seems. >>> Also, you said that sometimes the system comes up OK and other times it doesn't. >> >> Yes, when I plug the adapter board in, it boots most of the times. But when I e.g. placed the LS11 on the breakout board it never booted OK. Only with DolphinDOS I got a BRK and mem-monitor at $44xx (sic!) > > Could you try a different LS11? Tried already as one of the first things. > Just in case you got a bad one. Also, if you have any, try a 74HC00, 74HCT00 or 74F00 instead of the LS00, same for the '11. I ordered a HCT for the 00. Just in case. I did not find HCT 11 though. >> http://dl.dropbox.com/u/58002657/cbm/c64/rom_adapter_0.png > > Looks OK to me... Please check in your circuit if the direct connection of pin 13 of the LS00 and pin 3 of the LS11 to +5V is there Yes, both are in place. > Could you upload a picture of the circuit as used? PCB: ===== http://dl.dropbox.com/u/58002657/cbm/c64/Scan-121008-0001.jpg http://dl.dropbox.com/u/58002657/cbm/c64/Scan-121008-0002.jpg On board and worn out with tens of rounds of de/re-soldering.. (full res - above 1MiB): ======================================================================================= http://dl.dropbox.com/u/58002657/cbm/c64/2012-10-08%2020.48.02.jpg http://dl.dropbox.com/u/58002657/cbm/c64/2012-10-08%2020.48.19.jpg >>> And if it works, how stable is the system? >> >> Looks stable. At least I can input few lines of BASIC and let it run. I didn't check anything with serial bus though. > > Hm, that means the idea in general is OK, there is just some detail we're missing. That's exactly what I sense here. BTW - connected also uIEC and loaded some stuff off it. So as long as we don't touch address / data bus electrically, things (once booted) look stable. Plugging any cart (touches the lines) and we are off... > The idea for this circuit came from another idea to replace the 3 ROMs with a single one, but he used 3 diodes instead of logic gates and was only able to fit a single image of each of the 3 into the EPROM that way. That one worked. The few extra ns the LS gates give us shouldn't make that much of a difference. Yes, timing-wise the only thing I thought of was the potentially non-trivial difference between the last three address bits validity when compared with the other ones. >>> How long are the lines between the board and your circuit? >> >> The final one is supposed to plug in directly to the sockets. For the proto I test now I ran two wires with _BASIC and _CHAROM directly off PLA to the adapter board. Wires are about five inches each. > > So you have the PLA still in its socket, meaning the lines to the BASIC and CHAR-ROM sockets are still connected to it? Now yes, but I tried also to take the signals off the ROM sockets. > A long trace with an open end can do bad things to the shape of the signal. Sure. But I doubt it would cause real problems with those levels and frequencies we run here. And if it does, then the signal must be really poor anyway. IMHO it /must/ run even with such suboptimal signal lines. It just has to be sturdy with a solid margin for such things. If such little thing puts it off the bounds, then something is wrong elsewhere /me thinks. > Try to grab the signals from the sockets and use shorter cables. That way you have the PLA on one end and the TTLs on the other, no open ends dangling in the breeze... I tried that too. I also tried to remove the two PLA pins from the socket (on another main board). >>> You can run an EPROM with _CS and _OE tied LOW and change the address inputs. After tAcc, you will see the the expected output on the data lines. That's how the PLA-replacement using a 27C512 works. >> >> I shall try this too out of other ideas.. > > Uhm, that only works for the PLA replacement and even then using an EPROM as a PLA isn't 100% reliable. As for our ROM replacement, you cannot tie _OE and _CS to ground, the system has to be able to disable the ROM for access to RAM and I/O. Yeah - seems that I become desperate after too many nights lost on this thing and stop thinking.. -- SD! Message was sent through the cbm-hackers mailing listReceived on 2012-10-08 20:00:09
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