Re: ROMs replacement

From: silverdr_at_wfmh.org.pl
Date: Mon, 8 Oct 2012 03:20:21 +0200
Message-Id: <F0C5CEF3-2FFF-477F-84C7-ABA5548F590C@wfmh.org.pl>
On 2012-10-07, at 14:34, Gerrit Heitsch wrote:

>> Thinking aloud as I don't have a scope here at hand to verify.. could it be that PLA's outputs are not fully compatible with the LS inputs? When sinking off the original ROMs there are no pullups nor anything else on the way. Maybe we need something when connecting those outputs to the LS?
> 
> No, then there is a 74LS139 connected to one of the PLA outputs and that doesn't give any trouble.
> 
> The vertical bars are indeed strange. Especially since they only happen in the border area where the Char-ROM is not involved in any way.
> 
> Did you remember to put the pullups where they belong so that no input of the LS00 or LS11 is ever floating, no matter what your switches are set to? Also, did you remember to include 100nF ceramic capacitors between GND and Vcc for the LS?

Please correct me if that's completely wrong but can't it be some sort of timing problem between the moment when all the address lines become stable and the moment _CS/_OE becomes active? I mean we have 12 address lines that are driven directly from the main board and I assume that the address bus on the main board should be already stable when appropriate _CS line is taken down by PLA. I guess the _KERNAL/_CHAROM/_BASIC /follows/ the address bus validity because those are actually the address bus values, which need to be decoded in order to trigger appropriate output, isn't it so? If this is right then we have now three lines that are not derived off address bus but are driven using actually the _CS signals themselves. This means that on one hand we have some delay in processing the _CS signal (which I don't care about now), on the other hand we propagate address bus bits at /the very same time/ as we trigger the EPROM. Might this lead to potential on-the-verge type of timing problems when 12 address bits are "long" in their expected states and three only now arrive? OTOH tACC seem to be listed as identical to tCS on the EPROMs' datasheets. But maybe that's exactly the case? If they are the same then it can be easy to get off a ns or two.. ? Yeah, for the amount of time spent on this, I run out of ideas to try..

-- 
SD!
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Received on 2012-10-08 02:00:15

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