Hello, * On Mon, Sep 17, 2012 at 08:08:15PM +0200 Gerrit Heitsch wrote: > On 09/17/2012 08:00 PM, Spiro Trikaliotis wrote: > >Hello, > > > >* On Mon, Sep 17, 2012 at 07:00:45PM +0200 Gerrit Heitsch wrote: > > > >>You will also need the '245 to give the 6502 the ability to tristate > >>the address lines. Not sure if you really need the '245 for the data > >>lines, I thought those are tristate in the 6502 already, but it > >>can't hurt. > > > >They are not really tristate in the 6502. > > This here says otherwise: > > http://www.weihenstephan.org/~michaste/pagetable/6502/6502.jpg Where is the contradiction? The output (data output register, DOR) is connected to the external data bus with tristate buffers. Note that this is an output. OTOH, the predecode register (PD) and input data latch (DL) are always connected to the external data bus. Thus, they sink any current that is on the external data bus. Thus, the data bus is not really tristate. But: This should be "enough tristate" in order to not have to tristate the data bus externally. That's what I already wrote in my first mail. As long as the PD and the DL do not sink too much current (which, in conjunction with the current sink of the really addressed I/O or memory device, might be too much for the device driving the data bus), everything should be o.k. That's what I wrote (or, at least, wanted to write) in the rest of the quote which you did not include. :) Regards, Spiro. -- Spiro R. Trikaliotis http://www.trikaliotis.net/ Message was sent through the cbm-hackers mailing listReceived on 2012-09-17 19:01:32
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