Re: RAM replacements

From: Ruud_at_Baltissen.org
Date: Wed, 12 Sep 2012 20:56:16 +0200
Message-ID: <5050DAD0.9372.129B9B3@Ruud.Baltissen.org>
Hallo Gerrit,


> The LE-signal for the 74HCT573 is connected to _RAS. The OR-Gate takes 
> _RAS and _CAS as inputs and the output is the _CS signal for the SRAM. 
> In theory, just _CAS should work, but it doesn't, the system crashes, 
> possible due to _CAS being run through the PLA and _RAS going inactive 
> before _CAS does.
> 
> With the OR-Gate the circuit works.

I don't understand this. Using an OR gate means that _CS is only 
active LOW when as well _CAS as _RAS are LOW. Then why doesn't _RAS 
alone work? I cannot image that _RAS starts to early. IMHO it will 
become LOW after every flank of PHI2.

If you has said you ANDed both signals, I would have taken that for 
granted immediately.


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