Re: Broken TED for

From: Gerrit Heitsch <>
Date: Thu, 19 Jul 2012 17:25:15 +0200
Message-ID: <>
On 07/19/2012 08:22 AM, Segher Boessenkool wrote:
>>>> Hm, on the lower row of pads I find damage that looks very similiar,
>>>> just not as extreme though.
>>> I don't see anything like it?  At many places the metal is cracked and
>>> darkened, but near A7 it is totally black and not cracked.
>>> But who knows :-)
>> Could be... But what caused the driver for A7 to die in that fashion
>> though? I should have tested all the signals before mailing in the CPU
>> to see if any of them were dead.
> A short circuit on the pin: if something (external) drives the address
> line high while the CPU pulls it low, a nice big large current goes
> through that big FET where the metal turned black.  It's not built
> for such large currents, it's too high resistance for that, you get
> heat, stuff melts and whatnot.

The thing is, there have been external memory expansions for the C16 
that must have done exactly that with the _CAS line from TED without 
killing it outright. The default is that the RAM in the C16 is mirrored 
4 times and there is no way on the expansion port to disable it. The 
only way to add another 16 KB on an external board is to force _CAS for 
the internal RAM high at the proper address space and generate your own 
_CAS for the RAM on the board.

All the 16KB expansions I know have an extra single transistor on board 
that would provide the power to do that:

I'm still no sure how they were able to get the 64K RAM expansions to 
work on the expansion port with only multiplexers and the RAMs with the 
internal RAM still in place. I never bought one, I replaced the internal 
RAMs with 41464.

>> If MOS stuck to the usual numbering scheme, it would mean the 8500
>> came first, at least as far as the design is concerned. Also, they did
>> manufacture the 6510 and the 8500 in parallel for a while. I do have
>> an 8500 with a 1985 datecode and a few 6510 with 1986 datecodes. I
>> wonder why they did it... Reliability issues that caused them to go
>> back to the 6510 until they were cleared up?
> Maybe they simply needed more CPUs than their 8xxx production lines
> could make at the time.  They also used various fabs in various
> countries, it stands to reason that not all of those were upgraded
> to the new  process at the same time (if at all).

As far as I remember, all MOS chips were made at the one MOS plant in 
USA and then the wafers shipped to other countries for packaging. With 
the exception of the ceramic ones and prototypes. Maybe Bil can clear 
that one up?

> Sure, I'd love to see those as well, but the 6510 has bigger differences
> to both endpoints we have pics for so far (6502 and 8501).  And it's
> historically more interesting.

I expect it to be quite similiar to the 8501, just in NMOS since I doubt 
they did a full relayout of the CPU from NMOS to HMOS.


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Received on 2012-07-19 16:00:06

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