Re: CPLD/FPGA course

From: Mark McDougall <>
Date: Sat, 09 Jun 2012 11:20:08 +1000
Message-ID: <>
On 9/06/2012 5:45 AM, Bil Herd wrote:

> I have seen Xylinx parts not work at speed, as in internal noise, ultimately
> Xylinx admitted that there were problems.  This was some of their big
> expensive parts that ultimately couldn’t be "loaded up and ran" as this wasn’t
> not a subtle problem where you track down a glitch, whole sections
> propagated invalid states.

Xilinx, not Xylinx

Wonder if it was SSN (simultaneous switching noise)? When large portions of 
a device change state at the same time, it momentarily pulls a lot of 
current and also produces noise that can effect other parts of the device. 
It's something you need to be mindful of even in "non-faulty" devices, but 
it sounds like they had more than normal problems with it!?!

I have a design that has been running on 4 different Altera devices; 
Cyclone, Cyclone II, Cyclone III & Startix III. Involves a rather wide mux 
and is scalable. On the Stratix III I have it running up to 64 inputs side. 
Even on the lower-end Cyclone II it handles at least 16 inputs. On Xilinx 
devices it craps out after 8 inputs. And if you try more, the synthesis runs 


|              Mark McDougall                | "Electrical Engineers do it
|  <>   |   with less resistance!"

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Received on 2012-06-09 02:00:04

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