Re: 6809 / 6702 puzzle

Date: Mon, 30 Apr 2012 11:17:13 +0200
Message-ID: <16766291.6211335777433403.JavaMail.www@wwinf3711>
1) Agreed. On a power-up or reset condition the 6702 should respond with a unique defined sequence. This should be provable by those of 
you with a real SuperPET. The 6702 sequence won't repeat indefinitely, it will either wrap-around after a number of iterations (like a 
conventional polynomial or partial remainder table would) or some of the writes to the 6702 effectively cause the sequence to repeat by 
design. Not having a SuperPET  (or a 6702 daughter card) prevents me from undertaking any more investigation work.

2) The assembler language routines within the Waterloo software use LDA, STB, ASL, EORB etc. instructions to access the 6702. The hardware 
design of the SuperPET should ensure that these instructions correctly and reliably handle the 6702 irrespective of the access time of the 
device itself (i.e. wait states should have been incorporated into the hardware design to ensure that the access time of all the 
peripheral devices are within specifications. The BASIC PEEK and POKE commands ultimately end up at an LDA or a STA assembler instruction 
anyhow so these should work reliably as well. 

The concern may, therefore, be in the speed of (say) reading one byte from the 6702 and then writing the next byte back to the 6702 with a 
different instruction (which leads on to your point 3).

3) Agreed. Phi2 could be used this way - but equally well (and more likely) is that it is used to synchronise the read or write transfer 
just like any other synchronous peripheral device. if the 6702 was used in this way - I would expect to see some form of 'interrupt lock-
out' from preventing interrupts from occurring within the Waterloo software - but this appears to be not present. If interrupts are 
enabled, and interrupt processing is being utilised (either by the system or user program), then this would disturb the timing between 
6702 accessing within the Waterloo 6702 checking sub-routine and would, therefore, make the process unreliable as a result.

On the whole I think it more likely that Phi2 is used as a synchronous clock. I don't think the 6702 is as clever as we give it credit 
for. Generally, the protection within the Waterloo software was relatively easy to defeat. Having implemented dongle protection mechanisms 
myself on company products I would have made it much harder!


> Message Received: Apr 30 2012, 05:40 AM
> From: "William Levak" <wlevak@SDF.ORG>
> To:
> Cc: 
> Subject: Re: 6809 / 6702 puzzle
> A couple observations:
> 1)  The 6702 has an input for the system reset. This means that the 6702 
> must have one continuous sequence, OR, there is a software reset command 
> for the 6702.
> 2)  A hardware chip of this size would have a response time of 50 
> micrseconds, or less.  PEEKing and POKing from BASIC may not be fast 
> enough to see all the output.
> 3) The 6702 is connected to phi2.  I may be capable of responding after a 
> predetermined number of clock cycles, or of resetting if the correct 
> sequence is not received in a predetermined interval.
> SDF Public Access UNIX System -
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Received on 2012-04-30 10:00:09

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