Hello! firstname.lastname@example.org wrote: > My suggestion, therefore, is to print out all three schematics and to > cross-check them with each other and find out which two agree with each > other! I also came across an issue associated with data bus termination > - or lack of - stating that the addition of 10 kOhm pull-up and > pull-down resistors on the data bus cured some unreliability issues. Any > redesign should incorporate any known bugfixes. I did not look at Ruud's schematics yet, but this definitely will need to be done :-) > However, I also believe that other software is downloaded from the host > processor to the 8088 which will probably do 'bit twiddling' on the > hardware to implement functionality that is not coded in the EPROM - so > analysing the EPROM code for the functionality of the peripheral chips > may not identify what is actually required. For example, the TOD > functionality of the 6526 is clearly used as someone has gone to the > trouble of wiring up the TOD input - this feature is not activated from > within the EPROM. The 6526 also appears to generate interrupts as the > IRQ pin is wired. So the question is do we go for a minimal emulation of > the 6525/6526 and expand it as we find functionality that is used that > we have not implemented or do we go for a full-blown emulation and find > that there is unused functionality - or do we just implement what > appears easy and leave the rest for later? I have the disassembly of MS-DOS bootloader laying somewhere, so I will check whether it contains any code to interface directly with I/O chips. My understanding was that it does not, leaving everything to the IPC routines in EPROM. > The EPROM code appears to also do 'strange' things. For instance, the > Stack Pointer (SP) is initialised when reset - but not the Stack Segment > (SS) as I would have expected. The default is for SS to be initialised > to 0 on a reset. Interrupts are clearly used by the EPROM code - but I > have not yet found anywhere where the 8088 interrupt vectors are > actually initialised (unless this is initially done by the host > processor). I have found some code in the EPROM which does play with the > interrupt vectors - but this only seems to be executed later on once an > interrupt has already occured. I will print out the source code listing > from vintagecomputers.net tomorrow and have a read - it may shed some > more light on this issue. Interrupt pointers and other stuff, are set up by the host, and only then an interrupt is sent by it to the 8088. Regards, Michau. Message was sent through the cbm-hackers mailing listReceived on 2012-04-24 16:00:33
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